shithub: psxe

Download patch

ref: dd3b848162f118070b1d669c7983eb83b712ad53
parent: 7fe1764f59c4d2e551f056ada71c33413399fd61
author: allkern <lisandroaalarcon@gmail.com>
date: Tue Jul 18 17:09:02 EDT 2023

Fix Hblank callback

--- a/psx/dev/cdrom.c
+++ b/psx/dev/cdrom.c
@@ -52,27 +52,42 @@
     0x9e, 0x9f, 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5,
 };
 
-void cdrom_cmd_unimplemented(psx_cdrom_t*) {}
-void cdrom_cmd_getstat(psx_cdrom_t*) {}
-void cdrom_cmd_setloc(psx_cdrom_t*) {}
-void cdrom_cmd_readn(psx_cdrom_t*) {}
-void cdrom_cmd_stop(psx_cdrom_t*) {}
-void cdrom_cmd_pause(psx_cdrom_t*) {}
-void cdrom_cmd_init(psx_cdrom_t*) {}
-void cdrom_cmd_unmute(psx_cdrom_t*) {}
-void cdrom_cmd_setfilter(psx_cdrom_t*) {}
-void cdrom_cmd_setmode(psx_cdrom_t*) {}
-void cdrom_cmd_getlocl(psx_cdrom_t*) {}
-void cdrom_cmd_getlocp(psx_cdrom_t*) {}
-void cdrom_cmd_gettn(psx_cdrom_t*) {}
-void cdrom_cmd_gettd(psx_cdrom_t*) {}
-void cdrom_cmd_seekl(psx_cdrom_t*) {}
-void cdrom_cmd_seekp(psx_cdrom_t*) {}
-void cdrom_cmd_test(psx_cdrom_t*) {}
-void cdrom_cmd_getid(psx_cdrom_t*) {}
-void cdrom_cmd_reads(psx_cdrom_t*) {}
-void cdrom_cmd_readtoc(psx_cdrom_t*) {}
+void cdrom_cmd_unimplemented(psx_cdrom_t* cdrom) {}
+void cdrom_cmd_getstat(psx_cdrom_t* cdrom) {}
+void cdrom_cmd_setloc(psx_cdrom_t* cdrom) {}
+void cdrom_cmd_readn(psx_cdrom_t* cdrom) {}
+void cdrom_cmd_stop(psx_cdrom_t* cdrom) {}
+void cdrom_cmd_pause(psx_cdrom_t* cdrom) {}
+void cdrom_cmd_init(psx_cdrom_t* cdrom) {
+    log_fatal("CdlInit");
 
+    if (!cdrom->delayed_response_command) {
+        SEND_INT3(DELAY_1MS);
+        RESP_PUSH(cdrom->stat);
+
+        cdrom->delayed_response_command = 0x0a;
+    } else {
+        SEND_INT2(DELAY_1MS);
+        RESP_PUSH(cdrom->stat);
+
+        cdrom->delayed_response_command = 0x00;
+    }
+}
+
+void cdrom_cmd_unmute(psx_cdrom_t* cdrom) {}
+void cdrom_cmd_setfilter(psx_cdrom_t* cdrom) {}
+void cdrom_cmd_setmode(psx_cdrom_t* cdrom) {}
+void cdrom_cmd_getlocl(psx_cdrom_t* cdrom) {}
+void cdrom_cmd_getlocp(psx_cdrom_t* cdrom) {}
+void cdrom_cmd_gettn(psx_cdrom_t* cdrom) {}
+void cdrom_cmd_gettd(psx_cdrom_t* cdrom) {}
+void cdrom_cmd_seekl(psx_cdrom_t* cdrom) {}
+void cdrom_cmd_seekp(psx_cdrom_t* cdrom) {}
+void cdrom_cmd_test(psx_cdrom_t* cdrom) {}
+void cdrom_cmd_getid(psx_cdrom_t* cdrom) {}
+void cdrom_cmd_reads(psx_cdrom_t* cdrom) {}
+void cdrom_cmd_readtoc(psx_cdrom_t* cdrom) {}
+
 typedef void (*cdrom_cmd_t)(psx_cdrom_t*);
 
 cdrom_cmd_t g_psx_cdrom_command_table[] = {
@@ -114,8 +129,6 @@
 typedef void (*psx_cdrom_write_function_t)(psx_cdrom_t*, uint8_t);
 
 uint8_t cdrom_read_status(psx_cdrom_t* cdrom) {
-    //log_fatal("    Status read %02x, pfifo_index=%u", cdrom->status, cdrom->pfifo_index);
-
     return cdrom->status;
 }
 
@@ -167,8 +180,6 @@
     cdrom->delayed_response_command = 0;
     cdrom->command = value;
 
-    g_psx_cdrom_command_table[value](cdrom);
-
     log_fatal("    Command %02x (pfifo=%02x, %02x, %02x, %02x), pfifo_index=%u",
         value,
         cdrom->pfifo[0],
@@ -177,6 +188,8 @@
         cdrom->pfifo[3],
         cdrom->pfifo_index
     );
+
+    g_psx_cdrom_command_table[value](cdrom);
 }
 
 void cdrom_write_pfifo(psx_cdrom_t* cdrom, uint8_t value) {
@@ -260,6 +273,20 @@
     cdrom_write_status, cdrom_write_rcdrspuv, cdrom_write_rcdlspuv, cdrom_write_volume
 };
 
+const char* g_psx_cdrom_read_names_table[] = {
+    "cdrom_read_status", "cdrom_read_rfifo", "cdrom_read_dfifo", "cdrom_read_ier",
+    "cdrom_read_status", "cdrom_read_rfifo", "cdrom_read_dfifo", "cdrom_read_ifr",
+    "cdrom_read_status", "cdrom_read_rfifo", "cdrom_read_dfifo", "cdrom_read_ier",
+    "cdrom_read_status", "cdrom_read_rfifo", "cdrom_read_dfifo", "cdrom_read_ifr"
+};
+
+const char* g_psx_cdrom_write_names_table[] = {
+    "cdrom_write_status", "cdrom_write_cmd"     , "cdrom_write_pfifo"   , "cdrom_write_req"     ,
+    "cdrom_write_status", "cdrom_write_smdout"  , "cdrom_write_ier"     , "cdrom_write_ifr"     ,
+    "cdrom_write_status", "cdrom_write_sminfo"  , "cdrom_write_lcdlspuv", "cdrom_write_lcdrspuv",
+    "cdrom_write_status", "cdrom_write_rcdrspuv", "cdrom_write_rcdlspuv", "cdrom_write_volume"
+};
+
 psx_cdrom_t* psx_cdrom_create() {
     return (psx_cdrom_t*)malloc(sizeof(psx_cdrom_t));
 }
@@ -287,6 +314,8 @@
 }
 
 uint8_t psx_cdrom_read8(psx_cdrom_t* cdrom, uint32_t offset) {
+    log_fatal("CDROM read -> %s", g_psx_cdrom_read_names_table[(STAT_INDEX << 2) | offset]);
+
     return g_psx_cdrom_read_table[(STAT_INDEX << 2) | offset](cdrom);
 }
 
@@ -299,6 +328,8 @@
 }
 
 void psx_cdrom_write8(psx_cdrom_t* cdrom, uint32_t offset, uint8_t value) {
+    log_fatal("CDROM write -> %s (%02x)", g_psx_cdrom_write_names_table[(STAT_INDEX << 2) | offset], value);
+
     g_psx_cdrom_write_table[(STAT_INDEX << 2) | offset](cdrom, value);
 }
 
@@ -311,11 +342,8 @@
 
             cdrom->irq_delay = 0;
 
-            log_fatal("delayed_command=%02x", cdrom->delayed_response_command);
-
             if (cdrom->delayed_response_command) {
                 g_psx_cdrom_command_table[cdrom->delayed_response_command](cdrom);
-                log_fatal("Delayed execution delay=%08x cmd=%02x", cdrom->irq_delay, cdrom->delayed_response_command);
             }
         }
     }
--- a/psx/dev/gpu.c
+++ b/psx/dev/gpu.c
@@ -993,6 +993,9 @@
                       (gpu->cycles <= GPU_CYCLES_PER_SCANL_NTSC);
     
     if (curr_hblank && !prev_hblank) {
+        if (gpu->event_cb_table[GPU_EVENT_HBLANK])
+            gpu->event_cb_table[GPU_EVENT_HBLANK](gpu);
+
         gpu_hblank_event(gpu);
     } else if (prev_hblank && !curr_hblank) {
         if (gpu->event_cb_table[GPU_EVENT_HBLANK_END])
--- a/psx/dev/ic.c
+++ b/psx/dev/ic.c
@@ -53,7 +53,7 @@
 void psx_ic_write32(psx_ic_t* ic, uint32_t offset, uint32_t value) {
     switch (offset) {
         case 0x00: ic->stat &= value; break;
-        case 0x04: log_fatal("32 IMASK write %08x", value); ic->mask = value; break;
+        case 0x04: ic->mask = value; break;
 
         default: {
             log_warn("Unhandled 32-bit IC write at offset %08x (%08x)", offset, value);
@@ -69,7 +69,7 @@
 void psx_ic_write16(psx_ic_t* ic, uint32_t offset, uint16_t value) {
     switch (offset) {
         case 0x00: ic->stat &= value; break;
-        case 0x04: log_fatal("16 IMASK write %04x", value); ic->mask = value; break;
+        case 0x04: ic->mask = value; break;
 
         default: {
             log_warn("Unhandled 16-bit IC write at offset %08x (%08x)", offset, value);
--- a/psx/dev/timer.c
+++ b/psx/dev/timer.c
@@ -26,6 +26,12 @@
 #define T2_PAUSED timer->timer[2].paused
 #define T2_IRQ_FIRED timer->timer[2].irq_fired
 
+const char* g_psx_timer_reg_names[] = {
+    "counter", 0, 0, 0,
+    "mode", 0, 0, 0,
+    "target", 0, 0, 0
+};
+
 psx_timer_t* psx_timer_create() {
     return (psx_timer_t*)malloc(sizeof(psx_timer_t));
 }
@@ -43,6 +49,8 @@
     int index = offset >> 4;
     int reg = offset & 0xf;
 
+    log_fatal("Timer %u %s read32", index, g_psx_timer_reg_names[reg]);
+
     switch (reg) {
         case 0: return timer->timer[index].counter;
         case 4: {
@@ -62,6 +70,8 @@
     int index = offset >> 4;
     int reg = offset & 0xf;
 
+    log_fatal("Timer %u %s read16", index, g_psx_timer_reg_names[reg]);
+
     switch (reg) {
         case 0: return timer->timer[index].counter;
         case 4: {
@@ -87,6 +97,8 @@
     int index = offset >> 4;
     int reg = offset & 0xf;
 
+    log_fatal("Timer %u %s write32 %08x", index, g_psx_timer_reg_names[reg], value);
+
     switch (reg) {
         case 0: {
             timer->timer[index].counter = value;
@@ -106,6 +118,8 @@
 void psx_timer_write16(psx_timer_t* timer, uint32_t offset, uint16_t value) {
     int index = offset >> 4;
     int reg = offset & 0xf;
+
+    log_fatal("Timer %u %s write16 %04x", index, g_psx_timer_reg_names[reg], value);
 
     switch (reg) {
         case 0: {
--