ref: f616951742912b8ffe495055fbde5deaf85c490b
parent: 23871cadd9b8edef7d1e4b82f1b92ba1f9d52212
author: Jean-André Santoni <jean.andre.santoni@gmail.com>
date: Thu Jul 11 19:33:55 EDT 2024
Reindent
--- a/mem.c
+++ b/mem.c
@@ -27,6 +27,16 @@
int slotaddr[3] = {0, 0, 0};int nbank = 16;
+void
+cramwrite(uint16_t a, uint16_t v)
+{+ uint32_t w;
+
+ cram[a/2] = v;
+ w = v << 12 & 0xe00000 | v << 8 & 0xe000 | v << 4 & 0xe0;
+ cramc[a/2] = w;
+}
+
uint8_t
z80read(uint16_t a)
{@@ -134,14 +144,16 @@
printf(" write to control register\n");if ((port & 0x01) == 0x00)
port3E = v;
- else{- port3FHC = v & 0x05;
- port3F = ((v & 0x80) | (v & 0x20) << 1) & 0xC0;
- }
+ else{+ port3FHC = v & 0x05;
+ port3F = ((v & 0x80) | (v & 0x20) << 1) & 0xC0;
+ }
}else if ((port >= 0x40) && (port < 0x80))
printf(" write to SN76489 PSG\n");- else if ((port >= 0x80) && (port < 0xC0))
+ else if ((port >= 0x80) && (port < 0xC0)){ printf(" write to VDP\n");- else
+ //if ((port & 0x01) == 0x00)
+ //vdpwrite(v);
+ }else
printf(" write with no effect\n");}
--- a/vdp.c
+++ b/vdp.c
@@ -72,7 +72,7 @@
{uint16_t a;
int y;
-
+
switch(p - pctxt){default: a = (reg[PANT] & 0x38) << 9; break;
case 1: a = (reg[PBNT] & 7) << 12; break;
@@ -101,7 +101,7 @@
static int szs[] = {5, 6, 6, 7};int v, a, i;
struct pctxt *p;
-
+
pctxt[0].hs = pctxt[1].hs = szs[reg[PLSIZ] >> 4 & 3];
pctxt[0].ws = pctxt[1].ws = szs[reg[PLSIZ] & 3];
pctxt[2].ws = (reg[MODE4] & WIDE) != 0 ? 6 : 5;
@@ -166,7 +166,7 @@
{struct pctxt *p;
uint8_t v, pr;
-
+
p = pctxt + n;
if((p->t & 0x800) != 0){v = p->c & 15;
@@ -228,7 +228,7 @@
uint32_t v;
int i, ns, np, nt;
struct sprite *q;
-
+
t = (reg[SPRTAB] << 8 & 0x7f00);
p = vram + t;
q = spr;
@@ -286,7 +286,7 @@
uint16_t dx;
int v, col, set;
uint32_t *c;
-
+
set = 0;
col = 0;
for(p = spr; p < lsp; p++){--
⑨